Reference Materials
Xilinxi MicroBlazei Reference
The MicroBlazei reference guide is invaluable for anyone making use of the microprocessor. The reference guide contains a detailed description of the MicroBlazei architecture including information about the register set, pipelining, memory systems, and data types. The guide also contains a comprehensive list of all instructions supports by the MicroBlazei ISAi.
Xilinxi GPIOi Reference
The GPIOi reference guide describes the hardware specifications for the OPB GPIOi peripheral. The Xilinxi GPIOi peripheral is a design time configurable general purpose I/O device which gives software the ability to inspect and control wires within the FPGAi. This is done through a register set which is exposed by the GPIOi peripheral as a memory mapped region on the OPB bus. Software is able to read and write to this register set using standard load and store operations from the processors ISAi.
Xilinxi Interrupt Controller Reference
The Xilinxi interrupt controller reference guide describes the hardware specifications for the OPB INTC peripheral. This peripheral is a design-time configurable programmable interrupt controller. Modern processors are only capable of responding to one or two difference external interrupt sources. The programmable interrupt controller is a hardware peripheral which give more flexibility to system-on-chipi designers by taking an arbitrary number of interrupts sources and condensing them into a single interrupt source, the PIC itself. The PIC then exposes, as registers, the original sources of the interrupts. Thus, software is able to respond to an arbitrary number of interrupt sources by examining the PIC registers.